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| (R) EMIF04-MMC02F1 IPADTM 4 LINES EMI FILTER INCLUDING ESD PROTECTION MAIN APPLICATION MULTIMEDIACARDTM s DESCRIPTION The EMIF04-MMC02F1 is a highly integrated array designed to suppress EMI / RFI noise for MULTIMEDIACARDTM port filtering. The EMIF04-MMC02F1 flip-chip packaging means the package size is equal to the die size. That's why EMIF04-MMC02F1 is a very small device. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. BENEFITS 4 lines low-pass-filter High efficiency in EMI filtering Very low PCB space consuming: < 3.3 mm2 Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. s s s s s s s Flip Chip package PIN CONFIGURATION A3 B3 C3 D3 A2 B2 C2 D2 B1 C1 D1 COMPLIES WITH THE FOLLOWING STANDARDS : IEC 61000-4-2 Level 4: 15kV 8 kV (air discharge) (contact discharge) on input & output pins. MIL STD 883E - Method 3015-6 Class 3 TM : IPAD is a trademark of STMicroelectronics. September 2002 - Ed: 4A 1/6 EMIF04-MMC02F1 SCHEMATIC R10 R20 C2 B2 A2 B1 C1 D1 A3 B3 C3 D3 R1 R2 R3 R4 D2 GND ABSOLUTE MAXIMUM RATINGS (Tamb = 25 C) Symbol VPP Tj Top Tstg Parameter and test conditions ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Junction temperature Operating temperature range Storage temperature range Value 15 8 125 -40 to + 85 -55 to +150 Unit kV C C C ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current 2/6 EMIF04-MMC02F1 Symbol VBR IRM Cline R1,R2,R3,R4 R10 R20 P IR = 1 mA VRM = 3V @ 0V Tolerance 5% Tolerance 5% Tolerance 5% 47 13 56 70 Test conditions Min. 6 0.1 0.5 20 Typ. Max. Unit V A pF k k mW Fig. 1: Filtering measurements S21(dB) measurements of C3/C1 line 0.00 dB -5.00 -10.00 Fig. 2: Cross talk measurements Xtalk measurements C3/B1 0.00 dB -10.00 -20.00 -15.00 -20.00 -25.00 -30.00 -35.00 -60.00 -30.00 -40.00 -50.00 -40.00 -45.00 -50.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G 3.0G -70.00 -80.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G 3.0G Note: spikes at high frequencies are induced by the PCB layout. Fig. 3: Line capacitance versus reverse applied voltage. C(pF) 20 18 16 14 12 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 VR(V) 2.5 3.0 3.5 4.0 F=1MHz Vosc=30mVRMS Tj=25C 3/9 EMIF04-MMC02F1 Fig. 4: ESD response to IEC61000-4-2 (+15kV contact discharge). Positive Surge Negative Surge APLAC MODEL Fig. 5: Device structure B2 C2 R20 R1 A3 R2 B3 C3 D3 MODEL = demif04 R3 R4 R10 A2 B1 C1 D1 MODEL = demif04 MODEL = demif04_gnd 120pH 100m D2 DEMIF04 BV = 7 IBV = 1m CJO = Cz M = 0.3333 RS = 1 VJ = 0.6 TT = 100n DEMIF04 gnd BV = 7 IBV = 1m CJO = Cz_gnd M = 0.3333 RS = 1 VJ = 0.6 TT = 100n 4/9 EMIF04-MMC02F1 Fig. 6: Aplac model connections D2 Cins A3 Lbump Cins Rins Rbump B3 B1 Rins Cins Rins Rins Cins A2 aplacvar R1 47 opt aplacvar R2 47 aplacvar R3 47 aplacvar R4 47 aplacvar R10 13k aplacvar R20 56k aplacvar Cz 15pF opt aplacvar Cz_gnd 45pF opt aplacvar Ls 450pH opt aplacvar Rs 300m aplacvar Rbump 50m aplacvar Lbump 50pH aplacvar lhole 940pH opt aplacvar Rhole 100m aplacvar cap_hole 0.15pF aplacvar Cins 200fF aplacvar Rins 10Meg Cins Rins Lhole cap_hole Rins Rhole Rins Cins C3 Cins C1 Rins Cins D1 D3 Rins Cins Rins Cins 5/6 EMIF04-MMC02F1 Fig. 7: Aplac simulation versus frequency measurement. EMIF04-MMC02F1: Aplac vs measurement (C3/C1 line) 0.00 dB - 5.00 - 10.00 - 15.00 - 20.00 - 25.00 - 30.00 - 35.00 - 40.00 - 45.00 - 50.00 1.0M 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G 3.0G Measurement Simulation ORDER CODE EMIF Electro Magnetic Interference Filter 04 - MMC 02 F 1 Pitch and Bump version 1: pitch = 0.5mm bump = 0.3mm FLIP CHIP Nb of lines Version MULTIMEDIACARDTM port fonction PACKAGE MECHANICAL DATA 500 50 315 50 650 65 2070 50 1570 50 All dimensions in m 6/6 EMIF04-MMC02F1 MARKING 250 200 Dot identifying Pin A1 location* PACKING 250 1.5 +/- 0.1 4 +/- 0.1 1.75 +/- 0.1 230 (R) 3.5 +/- 0.1 8 +/- 0.3 FHT yww FHT yww FHT yww F HT YWW 1570 ST ST ST 2070 220 40 0.73 +/- 0.05 4 +/- 0.1 All dimensions in mm User direction of unreeling - yww: Date code OTHER INFORMATION Ordering code EMIF04-MMC02F1 Marking FHT Package Flip-Chip Weight 4.5 mg Base qty 5000 Delivery mode Tape & reel (7") Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and recommandations for use'' Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 7/6 |
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